Superdistribution

The Concept and the Architecture



8. Conclusions

We have developed an implementation for one step in the realization of a superdistribution architecture. This implementation has been achieved by inserting an emulated coprocessor containing the Software Usage Monitor into the coprocessor socket of an existing computer. Most personal computers already have such a socket in order to support a floating point coprocessor. It is possible to construct a single chip that combines the S-box with a floating point coprocessor, thus avoiding conflicts over the use of the socket. For those computers lacking a coprocessor socket, a special-purpose board inserted into an expansion slot can be used instead. In this case software is needed that simulates the coprocessor interface, but the overhead is not excessive

Although we have described our system in terms of application programs, it can also be applied to system programs as well. Our methods, moreover, can be adapted to a virtual computer system that supports multiple operating systems, an arrangement that is likely to be supported in personal computers of the future.

Containers for tangible items reflect the value and importance of their contents. No similar containers have existed for digital information despite the progress of microelectronics and communications networks. The lack of such containers has invited problems such as computer viruses and software piracy.

Digitally protected modules promise to provide such containers and thus to become one of the most fundamental applications of integrated circuits in the information society. We have viewed them as a fundamental support for our work on superdistribution, which aims to provide unrestricted distribution of commercial software.


Acknowledgements

We wish to thank Dr. Paul Abrahams, Consulting Computer Scientist, Deerfield Massachusetts and Professor Takashi Tokuyama. University of Tsukuba for their advice on this paper.

Ryoichi Mori was born in 1929. He received the B. E. and Ph. D degrees from The University of Tokyo in l953 and 1967, respectively. In 1989 he joined ET, MITI, then moved to the Institute of Information Sciences and Electronics, University of Tsukuba, in 1978, where he is a professor. He has been a Chairman of the Microcomputer Technology Committee of the Japan Electronic Industry Development Association since 1974. He is a Director of Euromicro. He received the Silver Core from IFIP in 1986.

Masaji Kawahara was born in Kagawa on April 9, 1962. He received the B. S. degree from University of Tsukuba. Tsukuba, Japan. in 1980. From 1985 to 1988, he joined Fujitsu Program Laboratory Ltd. Japan. He is now the first year graduate student of the master course of University of Tsukuba.


References

[1] R. Mori and S. Tashiro: The concept of Software Service System (SSS), Trans. IEICE, J70-D. 1, pp. 70-81 (Jan. 1987) .

[2] S. Tashiro and R. Mori: The implementation of a small scale prototype for Software Service System (SSS). Trans. IEICE. J70- D pp. 338-34 i (Feb. 1987) .

[3] S. R. White: ABYSS: A trusted architecture for software protection, Proc. 1987 IEEE Symp. on Security and Privacy. Oakland. CA. pp. 38-51 (April 1987).

[4] A. Herzberg and G. Karmi: Public protection of software; Advances in Cryptology; Proc. Crypto 85, ed. H. C. Williams, p. 188 (1986).

[5] D.J. Albert and S. P. Morse: Combating software piracy by encryption and key management, IEEE Computer, pp. 68-73 (April 1984).

[6] G. B. Purdy. G. J. Simmons and J. A. Studier: A software protection scheme; Proc. 1982 Symp. on Security and Privacy, Oakland, CA. pp. 99-103 (April 1982).

[7] Proposal for software authorization system standards; Ver 0.30, ADAPSO,Association of Data Processing Service Organization. (1985).

[8] S. H. Weingart: Physical security for the uABYSS system, Proc. 198, IEEE Symp. on Security and Privacy, Oakland, CA. pp. 52-58 (April 1987).

[9] MC68020 32-Bit Microprocessor User's Manual, Motorola Inc. (1986).

[10] MC68881 Floating Point Coprocessor User's Manual, Motorola Inc. (1988).

[11] Y. Akasaka and T. Nishimura: State of the art of three dimensional ICs, J. IEICE, 72, pp. 1417-1421 (1989).

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